The Parallel U -cycle Multigrid Method

A simple way to avoid idle processors in implementing the multigrid method on a parallel computer is to select a proper ner grid as the new coarsest grid. For clarity, the variant of the V-cycle generated by this approach is called the U-cycle in this paper. It is proved that the U-cycle with a ner coarsest grid can have a faster convergence rate, and the coarsest grid equations of the U-cycle can be solved approximately without increasing the total number of U-cycle iterations over what would be required using exact coarsest grid solutions. Then, a parallel U-cycle is deened by using domain partitioning techniques, which can be implemented on a MIMD multiprocessor computer without any idle processors. An analysis of the time complexity of the parallel U-cycle shows that the parallel U-cycle is fully scalable, and can have super-linear speed-up in comparison to the original V-cycle. Further, the scaled eeciency of the parallel U-cycle in the memory-constrained case is discussed. Numerical results are presented showing that the U-cycle can have a better performance than the V-cycle on a sequential computer while the parallel U-cycle can have a super-linear speed-up and a high eeciency on a large scale, MIMD multiprocessor computer. Experiments are presented for both the Intel Paragon and the IBM SP2.